IMEC maps out monolithic CFET at VLSI Symposium ...

Paper T1-3 is "Nanosheet-based Complementary Field-Effect Transistors (CFETs) at 48nm Gate Pitch and Middle Dielectric Isolation to enable CFET Inner Spacer Formation and Multi-Vt Patterning" The 48nm gate-pitch is significant because it is described as "industry-relevant."

IMEC is the leading source of ideas for advanced CMOS. The generally accepted roadmap is that the Complementary FET or CFET, which stacks nanosheet that vertically connects NMOS and PMOS transistors in a CMOS configuration, comes after gate-all-around (GAA) nanosheet transistors, followed by the so-called Forksheet (see Stacked CMOS could overcome Forksheet limitations, says IMEC).

The CFET and has been earmarked for possible insertion at a nominal 5 angstrom node (see IMEC semiconductor roadmap shows end of metal-pitch scaling). However, given some of the above-mentioned limitations of the Forksheet transistor, it is possible that CFET could come sooner. This could also come along with such innovations as 2D monolayer materials for the transistor channel, such as tungsten disulphide or molybdenum disulphide.

The upcoming paper discusses the successful demonstration of source/drain regions and contacts formed for either bottom or top devices. These monolithic CFETs have a sub-threshold swing of 70mV/decade. for the NFETs and 75mV/decade for the PFETs. Middle dielectric isolation (MDI) formed by SiGe replacement processing is introduced as an enabler for monolithic CFET formation and multi-VT patterning.

Cross sectional images for (a) bottom pFET and (b) top nFET. Source: IMEC.

Monolithic is also relevant as it represents an alternative means of CFET manufacture making monolayer n- and pFETs and then using wafer-to-wafer bonding. Monolithic production provides performance at the expense of manufacturing complexity. Sequential CFET manufacturing introduces a different form of manufacturing complexity but could present different levers to manufacturers for varying electron and hole mobility in the n-type and p-type transistors.

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